A Silicon Testing Strategy for Pulse-Width Failures

Srinivas Vooka, Khushboo Agarwal, Abhijeet Shrivastava, Pranav Murthy, Ramakrishnan Venkatraman. A Silicon Testing Strategy for Pulse-Width Failures. In Vishwani D. Agrawal, Srimat T. Chakradhar, editors, 25th International Conference on VLSI Design, VLSID 2012, Hyderabad, India, January 7-11, 2012. pages 352-357, IEEE, 2012. [doi]

@inproceedings{VookaASMV12,
  title = {A Silicon Testing Strategy for Pulse-Width Failures},
  author = {Srinivas Vooka and Khushboo Agarwal and Abhijeet Shrivastava and Pranav Murthy and Ramakrishnan Venkatraman},
  year = {2012},
  doi = {10.1109/VLSID.2012.96},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2012.96},
  researchr = {https://researchr.org/publication/VookaASMV12},
  cites = {0},
  citedby = {0},
  pages = {352-357},
  booktitle = {25th International Conference on VLSI Design, VLSID 2012, Hyderabad, India, January 7-11, 2012},
  editor = {Vishwani D. Agrawal and Srimat T. Chakradhar},
  publisher = {IEEE},
  isbn = {978-1-4673-0438-2},
}