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Ioannis Voyiatzis. Embedding test patterns into Low-Power BIST sequences. In 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece. pages 197-198, IEEE Computer Society, 2007. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: On Embedding Test Patterns into Low-Power Bist SequencesIoannis Voyiatzis. jcis, 49(2):58-64, 2008. [doi] A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated SequencesIoannis Voyiatzis. vlsi, 2008, 2008. [doi] Test Set Embedding into Low-Power BIST Sequences Using Maximum Bipartite MatchingIoannis Voyiatzis, K. Axiotis, N. Papaspyrou, H. Antonopoulou, Costas Efstathiou. pci 2012: 74-79 [doi]
The following publications are possibly variants of this publication: