Bipolar transistor epilayer design using the MAIDS mixed-level simulator

Leo C. N. de Vreede, Henk C. de Graaff, Joost A. Willemen, Wibo D. van Noort, Rik Jos, Lawrence E. Larson, Jan W. Slotboom, Joseph L. Tauritz. Bipolar transistor epilayer design using the MAIDS mixed-level simulator. J. Solid-State Circuits, 34(9):1331-1338, 1999. [doi]

@article{VreedeGWNJLST99,
  title = {Bipolar transistor epilayer design using the MAIDS mixed-level simulator},
  author = {Leo C. N. de Vreede and Henk C. de Graaff and Joost A. Willemen and Wibo D. van Noort and Rik Jos and Lawrence E. Larson and Jan W. Slotboom and Joseph L. Tauritz},
  year = {1999},
  doi = {10.1109/4.782094},
  url = {https://doi.org/10.1109/4.782094},
  researchr = {https://researchr.org/publication/VreedeGWNJLST99},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {34},
  number = {9},
  pages = {1331-1338},
}