A low-cost susceptibility analysis methodology to selectively harden logic circuits

Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda. A low-cost susceptibility analysis methodology to selectively harden logic circuits. In 21th IEEE European Test Symposium, ETS 2016, Amsterdam, Netherlands, May 23-27, 2016. pages 1-2, IEEE, 2016. [doi]

Authors

Imran Wali

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Bastien Deveautour

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Arnaud Virazel

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Alberto Bosio

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Patrick Girard

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Matteo Sonza Reorda

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