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Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults

I. Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri. Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults. In 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014. pages 223-225, IEEE, 2014. [doi]

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