A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs

Seongmoon Wang, Srimat T. Chakradhar. A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 25(8):1555-1564, 2006. [doi]

@article{WangC06:5,
  title = {A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs},
  author = {Seongmoon Wang and Srimat T. Chakradhar},
  year = {2006},
  doi = {10.1109/TCAD.2005.855929},
  url = {http://doi.ieeecomputersociety.org/10.1109/TCAD.2005.855929},
  tags = {test coverage, testing, coverage},
  researchr = {https://researchr.org/publication/WangC06%3A5},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {25},
  number = {8},
  pages = {1555-1564},
}