An at-speed self-testable technique for the high speed domino adder

Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Chi-Wei Liu, James Chien-Mo Li, Charlie Chung-Ping Chen. An at-speed self-testable technique for the high speed domino adder. In Rakesh Patel, Tom Andre, Aurangzeb Khan, editors, 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011. pages 1-4, IEEE, 2011. [doi]

@inproceedings{WangHLLLC11,
  title = {An at-speed self-testable technique for the high speed domino adder},
  author = {Yu-Shun Wang and Min-Han Hsieh and Chia-Ming Liu and Chi-Wei Liu and James Chien-Mo Li and Charlie Chung-Ping Chen},
  year = {2011},
  doi = {10.1109/CICC.2011.6055417},
  url = {http://dx.doi.org/10.1109/CICC.2011.6055417},
  researchr = {https://researchr.org/publication/WangHLLLC11},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011},
  editor = {Rakesh Patel and Tom Andre and Aurangzeb Khan},
  publisher = {IEEE},
  isbn = {978-1-4577-0222-8},
}