An at-speed self-testable technique for the high speed domino adder

Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Chi-Wei Liu, James Chien-Mo Li, Charlie Chung-Ping Chen. An at-speed self-testable technique for the high speed domino adder. In Rakesh Patel, Tom Andre, Aurangzeb Khan, editors, 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011. pages 1-4, IEEE, 2011. [doi]

Abstract

Abstract is missing.