Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness

Yuan Wang, Guangyi Lu, Yize Wang, Xing Zhang. Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness. IEICE Transactions, 100-C(3):344-347, 2017. [doi]

@article{WangLWZ17-2,
  title = {Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness},
  author = {Yuan Wang and Guangyi Lu and Yize Wang and Xing Zhang},
  year = {2017},
  url = {http://search.ieice.org/bin/summary.php?id=e100-c_3_344},
  researchr = {https://researchr.org/publication/WangLWZ17-2},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {100-C},
  number = {3},
  pages = {344-347},
}