A 1.0 fJ energy/bit single-ended 1 kb 6T SRAM implemented using 40 nm CMOS process

Chua-Chin Wang, Ralph Gerard B. Sangalang, I-Ting Tseng, Yi-Jen Chiu, Yu-Cheng Lin, Oliver Lexter July A. Jose. A 1.0 fJ energy/bit single-ended 1 kb 6T SRAM implemented using 40 nm CMOS process. IET Circuits, Devices & Systems, 17(2):75-87, March 2023. [doi]

Authors

Chua-Chin Wang

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Ralph Gerard B. Sangalang

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I-Ting Tseng

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Yi-Jen Chiu

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Yu-Cheng Lin

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Oliver Lexter July A. Jose

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