An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model

Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou. An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model. In 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan. pages 431-436, IEEE Computer Society, 2001. [doi]

Authors

Chun-Yao Wang

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Shing-Wu Tung

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Jing-Yang Jou

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