Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou. An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model. In 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan. pages 431-436, IEEE Computer Society, 2001. [doi]
@inproceedings{WangTJ01:0,
title = {An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model},
author = {Chun-Yao Wang and Shing-Wu Tung and Jing-Yang Jou},
year = {2001},
url = {http://csdl.computer.org/comp/proceedings/ats/2001/1378/00/13780431abs.htm},
tags = {design},
researchr = {https://researchr.org/publication/WangTJ01%3A0},
cites = {0},
citedby = {0},
pages = {431-436},
booktitle = {10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan},
publisher = {IEEE Computer Society},
isbn = {0-7695-1378-6},
}