A 4-kB 500-MHz 4-T CMOS SRAM using low-V::THN:: bitline drivers and high-V::THP:: latches

Chua-Chin Wang, Yih-Long Tseng, Hon-Yuan Leo, Ron Hu. A 4-kB 500-MHz 4-T CMOS SRAM using low-V::THN:: bitline drivers and high-V::THP:: latches. IEEE Trans. VLSI Syst., 12(9):901-909, 2004. [doi]

Abstract

Abstract is missing.