The following publications are possibly variants of this publication:
- A 12-bit 20-MS/s pipelined ADC with nested digital background calibrationXiaoyue Wang, Paul J. Hurst, Stephen H. Lewis. cicc 2003: 409-412 [doi]
- Background Calibration of Comparator Offsets in SHA-Less Pipelined ADCsCongyi Zhu, Jun Lin, Zhongfeng Wang. tcas, 66(2):357-361, 2019. [doi]
- A 12-bit 20-Msample/s pipelined analog-to-digital converter with nested digital background calibrationXiaoyue Wang, Paul J. Hurst, Stephen H. Lewis. jssc, 39(11):1799-1808, 2004. [doi]
- A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibrationCarl R. Grace, Paul J. Hurst, Stephen H. Lewis. jssc, 40(5):1038-1046, 2005. [doi]