Huanyu Wang, Geng Xie, Jie Gu. Comprehensive Analysis, Modeling and Design for Hold-Timing Resiliency in Voltage Scalable Design. In Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ISLPED 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016. pages 22-27, ACM, 2016. [doi]
Abstract is missing.