Yohji Watanabe, Ring Wong, Toshiaki Kirihata, Daisuke Kato, John K. DeBrosse, Takahiko Rara, Munehiro Yoshida, Rideo Mukai, Khandker N. Quader, Takeshi Nagai, Peter Poechmueller, Peter Pfefferl, Matthew R. Wordeman, Shuso Fujii. 2 256 Mb DRAM with ×32 both-ends DQ. J. Solid-State Circuits, 31(4):567-574, 1996. [doi]
Abstract is missing.