Charles F. Webb, Carl J. Anderson, Leon J. Sigal, Kenneth L. Shepard, John S. Liptay, James D. Warnock, Brian W. Curran, Barry Krumm, Mark D. Mayo, Peter J. Camporese, Eric M. Schwarz, Mark S. Farrell, Phillip J. Restle, Robert M. Averill III, Timothy J. Slegel, William V. Huott, Yuen H. Chan, Bruce Wile, Thao N. Nguyen, Philip G. Emma, Daniel K. Beece, Ching-Te Chuang, Cyril Price. A 4.1-ns compact 54/spl times/54-b multiplier utilizing sign-select Booth encoders. J. Solid-State Circuits, 32(11):1676-1682, 1997. [doi]
@article{WebbASSLWCKMCSF97,
title = {A 4.1-ns compact 54/spl times/54-b multiplier utilizing sign-select Booth encoders},
author = {Charles F. Webb and Carl J. Anderson and Leon J. Sigal and Kenneth L. Shepard and John S. Liptay and James D. Warnock and Brian W. Curran and Barry Krumm and Mark D. Mayo and Peter J. Camporese and Eric M. Schwarz and Mark S. Farrell and Phillip J. Restle and Robert M. Averill III and Timothy J. Slegel and William V. Huott and Yuen H. Chan and Bruce Wile and Thao N. Nguyen and Philip G. Emma and Daniel K. Beece and Ching-Te Chuang and Cyril Price},
year = {1997},
doi = {10.1109/4.641687},
url = {https://doi.org/10.1109/4.641687},
researchr = {https://researchr.org/publication/WebbASSLWCKMCSF97},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {32},
number = {11},
pages = {1676-1682},
}