On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning

Sverre Wichlund, Einar J. Aas. On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning. In Proceedings of the 2000 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, December 17-20, 2000. pages 416-419, IEEE, 2000. [doi]

Authors

Sverre Wichlund

This author has not been identified. Look up 'Sverre Wichlund' in Google

Einar J. Aas

This author has not been identified. Look up 'Einar J. Aas' in Google