On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning

Sverre Wichlund, Einar J. Aas. On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning. In Proceedings of the 2000 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, December 17-20, 2000. pages 416-419, IEEE, 2000. [doi]

@inproceedings{WichlundA00,
  title = {On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning},
  author = {Sverre Wichlund and Einar J. Aas},
  year = {2000},
  doi = {10.1109/ICECS.2000.911569},
  url = {https://doi.org/10.1109/ICECS.2000.911569},
  researchr = {https://researchr.org/publication/WichlundA00},
  cites = {0},
  citedby = {0},
  pages = {416-419},
  booktitle = {Proceedings of the 2000 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, December 17-20, 2000},
  publisher = {IEEE},
  isbn = {0-7803-6542-9},
}