Abstract is missing.
- Novel output buffer designs for universal serial bus IC applicationsHwang-Cherng Chow, Chen-Yi Huang, Chih-Hong Chang. 3-6 [doi]
- Low voltage, high speed fully differential CMOS op ampIvan Grech, Joseph Micallef, Tanya Vladimirova. 7-10 [doi]
- A high speed and low voltage BiCMOS tristate buffer with positive and negative charge pumpC. Suriyaammaranon, Kobchai Dejhan, F. Cheevasuvit, C. Soonyeekan. 11-14 [doi]
- A new biasing method for CMOS preamplifier-shapersMunir A. Abdallah, Christer Fröjdh, C. S. Petersson. 15-18 [doi]
- New memory sense amplifier designs in CMOS technologyY. Tsiatouhas, A. Chrisanthopoulos, George Kamoulakos, Th. Haniotakis. 19-22 [doi]
- Design of A/D converters using current-mode standard cellsZygmunt Ciota, Mariusz Jankowski, Andrzej Napieralski. 24-27 [doi]
- Reference voltage driver for low-voltage CMOS A/D convertersMikko Waltari, Kari Halonen. 28-31 [doi]
- A mismatch insensitive CMOS dynamic comparator for pipeline A/D convertersLauri Sumanen, Mikko Waltari, Kari Halonen. 32-35 [doi]
- Dynamic element matching in D/A converters with restricted scramblingMark Vesterbacka, Mikael Rudberg, J. Jacob Wikner, Niklas U. Andersson. 36-39 [doi]
- A modular approach for high Q microwave CMOS active inductor designKa Hing Chiang, K. V. Chiang, K. F. Lam, Wai Wa Choi, Kam-Weng Tam, Rui Paulo Martins. 41-44 [doi]
- 0.25 μm SOI technologies performance for low-power radio-frequency applicationsO. Rozeau, Sébastien Haendler, Jalal Jomaah, J. Boussey, Francis Balestra, C. Raynaud, J. L. Pelloie. 45-48 [doi]
- An eight-sector wireless infrared receiverLuis Nero Alves, José Luis Cura, Rui L. Aguiar, Dinis M. Santos. 49-52 [doi]
- Quantum MMIC: future and applications in RF circuitsNada El-Zein, Mandar Deshpande, Gary Kramer, Jonathan Lewis, Vijay Nair, Marilyn Kyler, Herb Goronkin. 53-56 [doi]
- A multimode extra high IF1 image rejection receiver for TDMA applicationsLampros Dermentzoglou, Aristodimos Pneumatikakis, Angela Arapoyanni, Yiannis Moisiadis. 57-60 [doi]
- Model-based coding of SAR and ultrasound imagesJosé-Gerardo Rosiles, Mark J. T. Smith. 62-65 [doi]
- Spreadsheet model for MorphoSys RC arrayHassan Diab, Emad Abdennour, Nashat Mansour. 66-69 [doi]
- An object oriented model for multimedia objectsLoay Sabry-Ismaïl. 70-73 [doi]
- An object-oriented approach to system modeling and codesign for multimedia applicationsGhassan Fayad, Karim Khordoc. 74-77 [doi]
- A global routing model for universal switch box designHongbing Fan, Jiping Liu, Yu-Liang Wu. 78-81 [doi]
- Iterative technique for approximate minimax design of complex digital FIR filtersEwa Hermanowicz, Marek Blok. 83-86 [doi]
- Design of m-channel tree-structured filter banks with very low-complexity analysis filtersElizabeth Elias, Per Löwenborg, Håkan Johansson, Lars Wanhammar. 87-90 [doi]
- Design of a selective digital filter for a DAVIC compliant modemAbbas Dandache, Fabrice Monteiro, Bernard Lepley. 91-94 [doi]
- Laguerre network design in complex domainMohammad Ali Masnadi-Shirazi, M. Safdar. 95-98 [doi]
- FIR filter mapping and performance analysis on MorphoSysHassan Diab, Emad Abdennour, Fadi Kurdahi. 99-102 [doi]
- An integrated digital PWM DC/DC converterChung-Hsien Tso, Jiin-Chuan Wu. 104-107 [doi]
- A low-voltage CMOS multiplier and its application to a 900 MHz RF downconversion mixerCarl J. Debono, Franco Maloberti, Joseph Micallef. 108-111 [doi]
- Low voltage SC TDM correlator for the extraction of time delayIvan Grech, Joseph Micallef, Tanya Vladimirova. 112-115 [doi]
- New CMOS integrated pulse width modulator for voltage conversion applicationsAbdelohahab Djemouai, Mohamad Sawan, Mustapha Slamani. 116-119 [doi]
- Very high-speed true random noise generatorFabrizio Cortigiani, Corrado Petri, Santina Rocchi, Valerio Vignoli. 120-123 [doi]
- A two-step quantization ΔΣ-modulator architecture with cascaded digital noise cancellationSaska Lindfors. 125-128 [doi]
- Stability analysis of an adaptive structure for sigma delta modulationMansour A. Aldajani, Ali H. Sayed. 129-132 [doi]
- Experimental circuit with current mode ΣΔ modulators with switched transconductanceRobert Suszynski. 133-136 [doi]
- Improved demodulation using multichannel estimation under reduced rank constraint: experimental resultsHussam Kassem, Philippe Forster. 138-141 [doi]
- In-band microwave video distribution system (IB-MVDS): network architectureMohamad M. Ayoub, Mohamed R. M. Rizk. 142-145 [doi]
- Electrothermal model of multilayer structure for the design of GaAs integrated circuit devicesMarcello Pesare, Agostino Giorgio, Anna Gina Perri. 146-151 [doi]
- Joint linear multi-sensor reception in downlink TD/CDMALaurent Ros, Joumana Farah, Marylin Arndt. 152-155 [doi]
- AR-based method for change detection using dynamic cumulative sumWassim El Falou, Mohamad Khalil, Jacques Duchêne. 157-160 [doi]
- Design-oriented characterization of CMOS over the continuum of inversion level and channel lengthDavid M. Binkley, Matthias Bucher, Daniel Foty. 161-164 [doi]
- A CAD tool for first hand CMOS circuit selectionP. Sun, A. J. Al-Khalili, Dhamin Al-Khalili. 165-168 [doi]
- An implementation scheme for a microprocessor emulatorWadih Zaatar, George E. Nasr. 169-172 [doi]
- Automatic design tool for submicron current steering logic librariesMaher Kayal, D. Cousinard, R. Kanan. 173-176 [doi]
- The application of computational intelligence to Fourier transformationQi-Wen Yang, Feng Lin, Guo-Hong Zhang, Jing-ping Jiang. 178-181 [doi]
- A novel architecture for Walsh Hadamard transforms using distributed arithmetic principlesAbbes Amira, Ahmed Bouridane, Peter Milligan. 182-185 [doi]
- Vector radix algorithm for the 2-D NMNTSaid Boussakta, Osama Alshibami, Ahmed Bouridane. 186-188 [doi]
- Fast computations on a low-cost DSP-based shared-memory multiprocessor systemCharalambos S. Christou. 189-192 [doi]
- A method for distributed unicast in hypercubesHossam M. A. Fahmy, Abu Bakr A. ElHefnawy. 194-197 [doi]
- Finite frequency test for Hurwitz 2-D polynomialsYang Xiao, Mangui Liang. 198-201 [doi]
- Negative resistance oscillators revisitedRoland P. Malhamé. 202-205 [doi]
- Novel precision full-wave rectifierStephan J. G. Gift. 206-209 [doi]
- Stacked L-shaped probe fed microstrip antennaA. I. Bahnacy, S. M. Elhalafawy, Yahia M. M. Antar. 210-213 [doi]
- Study and comparison of membership-set outer boundingHassani Messaoud, Saber Maraoui. 214-217 [doi]
- An algorithm for computing parameter bounds using prior information on physical parameter boundsHassani Messaoud, Zeineb Akoum. 218-221 [doi]
- Signal processing algorithm for OFDM channel with impulse noiseMaja Sliskovic. 222-225 [doi]
- An efficient multimodal variational analysis of cascaded asymmetric discontinuitiesKhaoula Allani. 226-229 [doi]
- Full-wave characterization of open-end and gap discontinuities of coplanar striplinesA. Mayouf, F. Djahli, S. Laib. 230-233 [doi]
- Design of random number generators for the HIPERLAN/1 channel access mechanismLukusa D. Kabulepa, Manfred Glesner. 234-237 [doi]
- A 4 GHz fractional-N frequency synthesizerRami Ahola, Kari Halonen. 239-242 [doi]
- A 12.5 GHz back-gate tuned CMOS voltage controlled oscillatorAhmed Mostafa, Mourad N. El-Gamal. 243-247 [doi]
- Delay oriented design methodology: application to the design of a VHF low power VLSI polyphase oscillatorA. Spataro, Yann Deval, Jean-Baptiste Begueret, Pascal Fouillat. 248-251 [doi]
- Very short locking time PLL based on controlled gain techniqueYoucef Fouzar, Mohamad Sawan, Yvon Savaria. 252-255 [doi]
- A novel architecture for sine-output direct digital frequency synthesizers using parabolic approximationAmir M. Sodagar, G. Roientan Lahiji, Ali Azarpeyvand. 256-259 [doi]
- Calculational design of special purpose parallel algorithmsAli E. Abdallah, John Hawkins. 261-267 [doi]
- Formal development of a reconfigurable tool for parallel DNA matchingAli E. Abdallah, G. Simiakakis, Theoharis Theoharis. 268-272 [doi]
- An algebraic approach to hardware/software partitioningShengchao Qin, Jifeng He. 273-276 [doi]
- A scheduling framework for system-level estimationYannick Le Moullec, Jean-Philippe Diguet, Jean Luc Philippe. 277-280 [doi]
- Speaker-dependent automatic helium speech normalisationAdam Podhorski, Jerzy Sawicki, Andrzej Brykalski. 282-285 [doi]
- An 8 Kb/s low-delay CELP speech coderHongmao Sun, Chunyan Wang 0004, M. Omair Ahmad, M. N. S. Swamy. 286-289 [doi]
- Speech encryption based on fast Fourier transform permutationShahram Etemadi Borujeni. 290-293 [doi]
- Color texture invariants for natural image recognition based on human visual systemJuliana F. Camapum Wanderley, Mark H. Fisher. 295-298 [doi]
- Fingerprint identification software for forensic applicationsZiad Abu-Faraj, Abdallah Atie, Kamal Chebaklo, Edouard Khoukaz. 299-302 [doi]
- Efficient high quality restoration of missing blocks in imagesZ. Alkachouh, M. Bellanger. 303-306 [doi]
- A new approach to object classification in binary imagesTami R. Randolph, Mark J. T. Smith. 307-310 [doi]
- Design and FPGA implementation of orthonormal discrete wavelet transformsMokhtar Nibouche, Ahmed Bouridane, Omar Nibouche, Danny Crookes, S. Boussekta. 312-315 [doi]
- FPGA-based Internet protocol firewall chipAyman I. Kayssi, Louis Harik, Rony Ferzli, Mohammad Fawaz. 316-319 [doi]
- Design of novel macro-cells for next generation ASIC cell libraryKiseon Cho, Minkyu Song. 320-323 [doi]
- An OFDM timing synchronization ASICStefan Johansson, Martin Nilsson, Peter Nilsson 0001. 324-327 [doi]
- Frame detection in high bit-rate CMOS systemsEduardo de Vasconcelos, Rui L. Aguiar. 328-331 [doi]
- An FPGA-based low-cost frame grabber for image processing applicationsDonglai Xu, Said Boussakta, John P. Bentley. 333-336 [doi]
- Fast techniques for time delay and Doppler estimationAbdeldjalil Ouahabi, Denis Kouamé. 337-340 [doi]
- Moving objects detection by block comparisonDalong Li. 341-344 [doi]
- New parallel architecture of the DCT and its inverse for image compressionM. Bousselmi, Mohamed Salim Bouhlel, Nouri Masmoudi, Lotfi Kamoun. 345-348 [doi]
- Isolated words recognition using neural networksHadi Harb, Abdul Hassan Husseiny. 349-351 [doi]
- Nonlinear operator for multipath channel estimation in GPS receiversRidha Hamila, Markku Renfors. 352-356 [doi]
- Differential GPS performance: ground versus geostationary satelliteSamer S. Saab 0001, Dany S. Charbachy. 357-360 [doi]
- A content-based medical teaching file assistant for CT lung image retrievalChii-Tung Liu, Pol-Lin Tai, Arlene Y.-J. Chen, Chen-Hsing Peng, Jia-Shung Wang. 361-365 [doi]
- Efficient FPGA implementation of Gaussian noise generator for communication channel emulationJean-Luc Danger, Adel Ghazel, Emmanuel Boutillon, Hédi Laamari. 366-369 [doi]
- A VLSI architecture of 2D wavelet transformsChokri Achour, Jean-Louis Houle, Jacob Davidson. 370-373 [doi]
- k-terminal reliability of communication networksJamil N. Ayoub, Wael H. Saafin, Bassam Z. Kahhaleh. 374-377 [doi]
- A new high output impedance current-mode universal filter with single input and three outputs using dual output CCIIsShahram Minaei, Hakan Kuntman, Oguzhan Cicekoglu, Sait Turkoz, Nil Tarim. 379-382 [doi]
- Digitally tuned analog integrated filters using the R-2R ladderHussain A. Alzaher, Mohammed Ismail 0001. 383-385 [doi]
- m-C filters in CMOS technologyRabin Raut. 386-389 [doi]
- DSP based sensorless control for induction motor using extended Kalman filterBing Deng, Tao Tian, Junmin Pan. 390-393 [doi]
- Practical design considerations on lumped element filters for microwave applicationsWei Li, Jan Vandewege. 394-397 [doi]
- A calculus of signalsC. Ratzko, J. W. Sanders. 399-402 [doi]
- A BSP performance prediction model for parallel multigrid algorithmsBabafemi O. Osoba, Fethi A. Rabhi, Mohamed Ould-Khaoua. 403-406 [doi]
- Hume: a bounded time concurrent languageKevin Hammond. 407-411 [doi]
- Formalising VERILOGJifeng He, Huibiao Zhu. 412-415 [doi]
- On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioningSverre Wichlund, Einar J. Aas. 416-419 [doi]
- Robust stability test for state-space models with structured uncertaintyYang Xiao. 421-424 [doi]
- A test pattern generation unit for memory NPSF built-in self testA. Chrisanthopoulos, George Kamoulakos, Y. Tsiatouhas, Angela Arapoyanni. 425-428 [doi]
- Comparing defect coverage for current-mode logic and CMOS VLSI cellsCôme Rozon, Dhamin Al-Khalili, Saman Adham, Douglas Racz. 429-432 [doi]
- Single and multiple fault diagnosis based on symbolic analysis and reduced set of observable points for linear analog circuitsFiorenzo Filippetti, Marcello Artioli. 433-436 [doi]
- Shape based alignment of 3-D volume slicesStelios Krinidis, Nikos Nikolaidis 0001, Ioannis Pitas. 438-441 [doi]
- On the use of the redundant wavelet transform for multisensor image fusionYoucef Chibani, Amrane Houacine. 442-445 [doi]
- Ballistic oracle at military borders (B.O.M.B)Mohamad Adnan Al-Alaoui, Rami Farran, Claudia Lakkis, Ralph Rabbat. 446-449 [doi]
- A vector coding with a compressive algorithm for natural imagesReiko Osada, Terumasa Aoki, Hiroshi Yasuda. 452-455 [doi]
- Development of a power efficient image coding algorithm based on integer wavelet transformKostas Masselos, Yorgos A. Karayiannis, I. Andreopoulos, Thanos Stouraitis. 457-460 [doi]
- Shape recognition based on wavelet-transform modulus maximaFaouzi Alaya Cheikh, Azhar Quddus, Moncef Gabbouj. 461-464 [doi]
- A unified systolic array design for wavelet-based video codecPol-Lin Tai, Chii-Tung Liu, Jia-Shung Wang. 465-468 [doi]
- An alternative process for solid state power amplifiers using large S parametersMathieu Hazouard, Eric Kerhervé, Pierre Jarry. 470-473 [doi]
- A 29 dBm 1.9 GHz class B power amplifier in a digital CMOS processPer Asbeck, Carsten Fallesen. 474-477 [doi]
- A polar linearisation system for RF power amplifiersPer Asbeck, Carsten Fallesen. 478-481 [doi]
- Amplifier's predistortion-based linearizers for forward-channel link broadband applicationsE. G. Jeckeln, F. M. Ghannouchi, M. A. Sawan, F. Beauregard. 482-485 [doi]
- A novel adaptive noise canceller with master-slave structureShao-li Kang, Yang Xiao, ZhengDing Qiu. 487-490 [doi]
- An efficient low-bit rate adaptive mesh-based motion compensation techniqueHanan A. Mahmoud, Magdy A. Bayoumi. 491-494 [doi]
- Pattern classification by the time adaptive self-organizing mapHamed Shah-Hosseini, Reza Safabakhsh. 495-498 [doi]
- Adaptive robot contact planning and controlFouad Mrad, Zafer Wazzan. 499-504 [doi]
- Behavioural synthesis of low power floating point CORDIC processorsJoe Costello, Dhamin Al-Khalili. 506-509 [doi]
- An efficient verification method for a class of multi-phase sequential circuitsFrançois-Raymond Boyer, El Mostapha Aboulhamid, Yvon Savaria. 510-515 [doi]
- A top-down interactive behavioral synthesis environmentIoannis Poulakis, Petros Economakos, George Economakos, Ioannis Panagopoulos, George K. Papakonstantinou. 516-519 [doi]
- A complete specification and implementation methodology for high-level hardware transformationsGeorge Economakos, Ioannis Drositis, George K. Papakonstantinou. 520-523 [doi]
- Area time power estimation for FPGA based designs at a behavioral levelSébastien Bilavarn, Guy Gogniat, Jean Luc Philippe. 524-527 [doi]
- Robust image transmission using source adaptive modulation with diversityJohn E. Kleider, Glen P. Abousleman. 529-532 [doi]
- Error-resilient video coding and application to telemedicineZhen Liu, Lina J. Karam, Glen P. Abousleman, Thomas Key, Bassem Razzouk. 533-536 [doi]
- Shot detection with multi-measuresDalong Li, Hanqing Lu. 537-540 [doi]
- Lighting change problem in shot detectionDalong Li, Hanqing Lu. 541-544 [doi]
- The effect of membership functions in fuzzy systems on the stability regionI. F. El Arabawy, Mohamed R. M. Rizk, H. S. Khaddam. 546-549 [doi]
- Fuzzy adaptive control: a hyperstability approachNoureddine Goléa, Amar Goléa, Khier Benmahammed. 550-553 [doi]
- Efficient representation of non-linear functions by fuzzy controllers design algorithmsJean J. Saade, Mohannad Al-Khatib. 554-557 [doi]
- Analog VLSI implementation of adaptive neuro-fuzzy inference systemsAhmed Sultan, Mohamed El-Sayed. 558-561 [doi]
- A programmable FIR filter using serial-in-time multiplication and canonic signed digit coefficientsMarko Kosunen, Kari Halonen. 563-566 [doi]
- Development of reusable serial FIR filters with reprogrammable coefficients designed for serial dataflow architecturesKostas Adaos, George Alexiou, Nick Kanopoulos. 567-570 [doi]
- Using a parametric filter to average brainstem auditory evoked potentialsMarek Jaskula, Roman Kaszynski. 571-574 [doi]
- A nonlinear optimization by Lagrangian relaxationsNaser Mollaverdi, Mohammad Modarres Yazdi. 575-578 [doi]
- Information processing in digital domainJasvir Singh, Davinder Pal Sharma, S. S. Bhatti, K. Kaur, Amanpreet Singh. 579-582 [doi]
- Split-radix algorithm for the new Mersenne number transformOsama Alshibami, Said Boussakta, Mohammed Aziz, D. Xu. 583-586 [doi]
- A tool for two's complement, bit-level, fixed-point simulation of digital filtersEsam Abdel-Raheem, Fayez El Guibaly. 587-590 [doi]
- A hybrid parallel algorithm for digital image filtering applicationsMohammed Aziz, Said Boussakta. 591-594 [doi]
- Pitch and formants extraction algorithm for speech processingAdnene Cherif. 595-598 [doi]
- Electrocardiogram data compression algorithm based on the linear prediction of the wavelet coefficientsMohammed Abo-Zahhad, Sabah M. Ahmed, A. Al-Shrouf. 599-603 [doi]
- Energy consumption minimisation with new synthesis methodIreneusz Brzozowski, Andrzej Kos. 605-608 [doi]
- An effective output-oriented algorithm for low power multipartition architectureShanq-Jang Ruan, Jen-Chiun Lin, Po-Hung Chen, Feipei Lai, Kun-Lin Tsai, Chung-Wei Yu. 609-612 [doi]
- Instruction scheduling for low power on dynamically variable voltage processorsMohammad M. Mansour, Makram M. Mansour, Ibrahim N. Hajj, Naresh R. Shanbhag. 613-618 [doi]
- High performance level restoration circuits for low-power reduced-swing interconnect schemesYiannis Moisiadis, Ilias Bouras, Angela Arapoyanni. 619-622 [doi]
- Symbolic linear Mathematica based technique for piecewise linear circuitsFiorenzo Filippetti, Marcello Artioli. 625-628 [doi]
- A robust digital watermarking techniqueM. A. Suhail, Mohammad S. Obaidat. 629-632 [doi]
- Fast learning automata for high-speed real-time applicationsMohammad S. Obaidat, Georgios I. Papadimitriou, Andreas S. Pomportsis. 633-636 [doi]
- n-1 multipliersCostas Efstathiou, Haridimos T. Vergos. 637-640 [doi]
- Genetic algorithm-based power transmission expansion planningAhmed R. Abdelaziz. 642-645 [doi]
- Minimum area in wheels [VLSI floorplanning]María José Gil Larrea, José Miguel Urquijo Aramburu, José Luis Gutiérrez Temiño. 646-649 [doi]
- Heuristics for graph decompositionHiba Tabbara, Tarek Dana, Nashat Mansour. 650-653 [doi]
- On improved graph-based alternative wiring scheme for multi-level logic optimizationYu-Liang Wu, Chin-Ngai Sze, Chak-Chung Cheung, Hongbing Fan. 654-657 [doi]
- BDD/AOG-based algorithm for multiple error rectification in combinational circuitsAyman Mohamed Wahba. 658-661 [doi]
- A scalable affine core for mesh-based video object motion compensationWael M. Badawy, Magdy A. Bayoumi. 663-666 [doi]
- Retrieval of video objects by compressed domain shape featuresBerna Erol, Faouzi Kossentini. 667-670 [doi]
- Kohonen-GLA algorithms for efficient vector quantizationCarolina Blanch-Pérez del Notario, Armando Malanda-Trigueros. 671-674 [doi]
- Switched-current bilinear ladder group-delay equalisersAndrew E. J. Ng, John I. Sewell. 676-679 [doi]
- Design and analysis of Turbo decoder for China 3rd generation mobile communication systemXuan Li, Wen-tao Song 0001, Han-wen Luo 0001. 680-683 [doi]
- Optimal multiplier coefficient values in cascade realized discrete networksBiljana Stojanovic, Miodrag Gmitrovic, Zlatoljub Milosavljevic. 684-687 [doi]
- A modified dithered signed-error constant-modulus algorithm for blind adaptive equalizerA. Tawfik, E. Abdel-Raheem, Pan Agathoklis. 688-691 [doi]
- A new approach for enumerating minimal cut-sets in a networkAhmed R. Abdelaziz. 693-696 [doi]
- (R)Issam W. Damaj, Jean J. Saade, Hassan B. Diab. 697-700 [doi]
- Fuzzy and neuro-fuzzy designs of boost converter supplying DC motorsVasile Dragos, Vasile Dan, Adriana Florescu, Dan A. Stoichescu. 701-704 [doi]
- Design of divergence-free protocol converters using supervisory control techniquesHesham Hallal, Radu Negulescu, Alexandre Petrenko. 705-708 [doi]
- The synthesis of a configuration to create a special potential distributionUte Diemar, Roland Suesse. 709-712 [doi]
- Robust noncollocated passive models of a flexible link with uncertain payload and joint inertiaMohamad Saad 0002, Lahcen Saydy, Ouassima Akhrif. 713-716 [doi]
- Control modeling of a FACTS device connected to a synchronous generatorBruno Heckmann, Lahcen Saydy. 717-720 [doi]
- Handling quality characterization of flight systems controller gainsLahcen Saydy, Ouassima Akhrif, Guchuan Zhu. 721-724 [doi]
- Neural network based programmed pulse width modulation usable on voltage source inverters (VSIs)Seyed Hossein Hosseini 0002, Mehrdad Tarafdar Haque, Sohrab Khanmohammadi. 725-728 [doi]
- A user-friendly and fast program for the simulation of power system faultsRaymond F. Ghajar, Karim Saikali. 729-732 [doi]
- Low-loss converters with high step-up conversion ratio working at the border between continuous and discontinuous modeFelix A. Himmelstoss, Peter H. Wurm. 734-737 [doi]
- Susceptibility and input impedance evaluation of a single phase unity power factor rectifierHadi Youssef Kanaan, Kamal Al-Haddad, Rachid Chaffai, Louis Duguay. 738-741 [doi]
- Improved wide input voltage range 1 kW solar inverterKarl H. Edelmoser, Felix A. Himmelstoss. 742-745 [doi]
- Comparison of different voltage control strategies for current regulated PWM inverters supplying an induction motorSeyed Hossein Hosseini 0002, Sohrab Khanmohammadi, H. Javidnia. 746-749 [doi]
- Construction of polyvalent error control codes for multilevel memoriesStefano Gregori, Pietro Ferrari, Rino Micheloni, Guido Torelli. 751-754 [doi]
- An asynchronous FIFO with fights: case study in speed optimizationSébastien Laberge, Radu Negulescu. 755-758 [doi]
- High-speed low-power sense comparator for multilevel flash memoriesAndrea Pierin, Stefano Gregori, Osama Khouri, Rino Micheloni, Guido Torelli. 759-762 [doi]
- An optimal reordering schema of homotopy equations for the analysis of nonlinear resistive circuitsArturo Sarmiento-Reyes, Luis Hernández-Martínez, Héctor Vázquez-Leal, A. Bocanegra-Haro, Rafael Vargas-Bernal. 764-767 [doi]
- Matrix-based search of a pair of compatible i-v orientations for the uniqueness analysis of nonlinear resistive circuitsArturo Sarmiento-Reyes, Luis Hernández-Martínez, Rafael Vargas-Bernal. 768-771 [doi]
- Detecting thresholds by means of jump-phenomenaThomas Mohr, F. Hermann Uhlmann. 772-775 [doi]
- A controller based on coefficient diagram method for the robotic manipulatorsAysegül Uçar, Serdar Ethem Hamamci. 777-780 [doi]
- A new approach for designing a PI controller via variable structure system theoryTarek M. M. Nasab. 781-784 [doi]
- A new variable structure control design with stability analysis for MIMO systemsTarek M. M. Nasab. 785-788 [doi]
- All-digital logic control PWM/PFC for inverter systemGyeong-Hae Han, Bum-Suk Ko. 789-792 [doi]
- Robust stochastic controller for a missile guidance systemMohamed R. M. Rizk, M. Abdel Rahim. 793-796 [doi]
- Changeover of counters in pulse generator with a numerical count discriminatorSamer S. Saab 0001, Abdul Aziz Hajjar. 798-801 [doi]
- New design method for controlling power stages based on IGBT switching ferrite transformers: applied to an 8 kW small size light weight electric welding machineA. Maouad, J. P. Charles, A. Khoury, A. Hoffmann. 802-804 [doi]
- Instantaneous components of power and actual physical phenomena in sinusoidal circuitsTadeusz Piotrowski. 805-808 [doi]
- Robust speed identification for speed sensorless vector control of current-fed double-star induction machineM. Faouzi-Mimouni, Rachid Dhifaoui. 809-813 [doi]
- VLSI design approach of complex motor control, case of direct torque control of AC machineFabrice Aubépart, Philippe Poure, Francis Braun. 814-817 [doi]
- Highly efficient multi-point clock distribution networksRui L. Aguiar, Dinis M. Santos. 819-822 [doi]
- A state assignment algorithm for finite state machinesDionisis Skias, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni. 823-826 [doi]
- On-chip crosstalk evaluation between adjacent interconnectionsGrégory Servel, Denis Deschacht. 827-834 [doi]
- An analytical model for delay and crosstalk estimation in interconnects under general switching conditionsMurat R. Becer, Ibrahim N. Hajj. 831-834 [doi]
- Adiabatic charging of long interconnectsBurkart Voss, Manfred Glesner. 835-838 [doi]
- Detection of cardiac late potentials using higher order time-frequencyA. Alliche, K. Mokrani. 840-843 [doi]
- Short-time Fourier transform analysis of the phonocardiogram signalAbdelghani Djebbari, Fethi Bereksi-Reguig. 844-847 [doi]
- An observer performance study of the effect of using the body contour in reconstructing cardiac SPECT images from truncated projection dataGeorge K. Gregoriou. 848-852 [doi]
- Effect of the silicon membrane flatness defect on the piezoresistive pressure sensor responseZohir Dibi, Ali Boukabache, Patrick Pons. 853-856 [doi]
- High-radix residue number system forward and inverse convertersVassilis Paliouras, Thanos Stouraitis. 858-861 [doi]
- Transition analysis on FPGA for multiplier-block based FIR filter structuresSüleyman Sirri Demirsoy, Andrew G. Dempster, Izzet Kale. 862-865 [doi]
- Pole-zero estimation of continuous and discrete time systemsMichael J. Corinthios. 866-869 [doi]
- A static CMOS master-slave flip-flop experimentMark Vesterbacka. 870-873 [doi]
- FM and FSK detection using a subtractor filterWagdy R. Anis. 875-878 [doi]
- Evolutionary design of electronic devicesVictor Kureichik, Lyudmila Zinchenko. 879-882 [doi]
- A high speed/power ratio continuous-time CMOS current comparatorLu Chen, Bingxue Shi, Chun Lu. 883-886 [doi]
- A 1.4 GHz/2.7 V programmable frequency divider for DRRS standard in 0.6 μm CMOS processHossein Zarei, Omid Shoaei, Sied Mehdi Fakhraie, M. M. Zakeri. 887-890 [doi]
- CMOS front-end for optical rotary encodersDavide Maschera, Andrea Simoni, Lorenzo Gonzo, Massimo Gottardi, Stefano Gregori, Valentino Liberali, Guido Torelli. 891-894 [doi]
- Steady state analysis of class-E amplifier with non-linear capacitor by means of discrete-time techniquesFrancisco del Águìla López, Pere Palà-Schönwälder, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas. 895-898 [doi]
- Glitch minimization and dynamic element matching in D/A convertersMikael Karlsson Rudberg, Mark Vesterbacka, Niklas U. Andersson, J. Jacob Wikner. 899-902 [doi]
- Multiple low swing voltage values for CPL, CVSL and domino logic familiesAbdoul Rjoub, Odysseas G. Koufopavlou. 903-906 [doi]
- High-speed CMOS current-mode wave-pipelined analog-to-digital converterChung-Yu Wu, Yu-Yee Liow. 907-910 [doi]
- Low-power CMOS implantable nerve signal analog processing circuitAdnan Harb, Mohamad Sawan. 911-914 [doi]
- A parallel loaded DC/DC resonant converter with a new power and control circuitS. H. Hosseini, M. Tarafdar Hague. 915-918 [doi]
- Mixed signal decoder for audio frequency applicationsH. M. Hamed, M. E. Zaghloul, Aly E. Salama, El-Sayed A. Talkhan. 919-922 [doi]
- An algorithm for finding all the DC solutions of short-channel MOS transistor circuitsMichal Tadeusiewicz, Stanislaw Halgas. 924-927 [doi]
- On the maximum number of DC solutions of general transistor networksRafael Vargas-Bernal, Arturo Sarmiento-Reyes, Luis Hernández-Martínez. 928-931 [doi]
- Delay analysis of neuron-MOS and capacitive threshold-logicPeter Celinski, Said F. Al-Sarawi, Derek Abbott. 932-935 [doi]
- Relation between MOSFET degradation and interface-states generationN. Guenifi, F. Djahli, A. Mayouf. 936-939 [doi]
- Numerical simulation and modeling of static characteristics and electrical noise in submicron MOS transistorsM. Fadlallah, Gérard Ghibaudo, Jalal Jomaah, M. Zoaeter. 940-943 [doi]
- Multifont Ottoman character recognitionAli Öztürk, Salih Güne?, Yüksel Özbay. 945-949 [doi]
- A redundancy approach to classifier trainingMohamad Adnan Al-Alaoui, Rodolphe Mouci, Mohamad Mansour. 950-953 [doi]
- Neural network modeling of land mobile radio channels with nonlinear transmit amplifiersS. Cherif, Ch. Khélifi. 954-957 [doi]
- Hybrid BP-GA for multilayer feedforward neural networksChun Lu, Bingxue Shi, Lu Chen. 958-961 [doi]
- A digitally programmable current mode analog shunting inhibition cellular neural networkAmine Bermak, Farid Boussaïd, Abdesselam Bouzerdoum. 962-965 [doi]
- Sparse deconvolution by means of genetic algorithmsIgnacio Gracia-Lozano, Armando Malanda-Trigueros. 967-970 [doi]
- Design centering of analog circuit's component values using parallel genetic algorithmsYaser M. A. Khalifa. 971-974 [doi]
- The use of genetic algorithms for statistical circuit designJianxin Liao, Min'an Li, Xi Chen, Jiandong Hu. 975-978 [doi]
- Application of allied genetic algorithms in sensorless speed adjustment control for induction motor drive systemFeng Lin, Qi-Wen Yang. 979-982 [doi]
- Extrapolation for band-pass delay time characteristics by using genetic algorithm on DCTTakefumi Suzuki, Shigenori Tomiyama. 983-986 [doi]
- A new design rule description for automated layout toolsLihong Zhang, Ulrich Kleine, Tobias Rudolph, Markus Wolf 0001. 988-992 [doi]
- The application of high-level synthesis techniques for the generation of pipelined reprogrammable microcontrollersMohamed Benmohammed, Abdelatif Rahmoune, Polen Kission. 993-998 [doi]
- SYSCUF: automated synthesis of switched current filterAlok Barua, Mahendra K. Chandrakar. 999-1003 [doi]
- Analog circuit for synapse neural networks VLSI implementationHussein Chible. 1004-1007 [doi]
- An oscillating algorithm for variable ordering in binary decision diagramMohamed Taher, A. Salem, H. Mahdi, A. Wahdan. 1008-1011 [doi]
- A hierarchical based approach for coupling aware delay analysis of combinational logic blocksNinglong Lu, Ibrahim N. Hajj. 1012-1015 [doi]
- Test insertion at the RT level using functional test metricsHaidar Harmanani, Salam Harfoush. 1016-1020 [doi]
- Novel speech spectra all-pole modelling based upon selective even-samples linear predictionK. F. Chang, Pedro Cheong, Sio-Weng Ting, Kam-Weng Tam. 1022-1025 [doi]
- System level testing of analog functions in a mixed-signal circuitMahmoud A. Al-Qutayri. 1026-1029 [doi]
- Program word-line voltage generator for multilevel flash memoriesOsama Khouri, Rino Micheloni, Andrea Sacco, Giovanni Campardo, Guido Torelli. 1030-1033 [doi]