Ireneusz Brzozowski - researchr alias

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Viewing Publication 1 - 15 from 15

2024

Comparative Analysis of Dynamic Power Consumption of Parallel Prefix AdderIreneusz Brzozowski. todaes, 29(3), May 2024. [doi]

Spiking Neural Network Pressure SensorMichal Markiewicz, Ireneusz Brzozowski, Szymon Janusz. neco, 36(11):2299-2321, 2024. [doi]

2021

Software Tool Aiding Analysis and Design of Low-Power Parallel Prefix AddersIreneusz Brzozowski. mixdes 2021: 141-146 [doi]

2020

Comparative Analysis of Power Consumption of Parallel Prefix AddersIreneusz Brzozowski. mixdes 2020: 94-100 [doi]

2016

Extraction of temperature dependent parameters for an electrothermal model of thermoelectric energy harvesterPiotr Dziurdzia, Piotr Bratek, Ireneusz Brzozowski, Wojciech Gelmuda, Jacek Ostrowski, Andrzej Kos. mixdes 2016: 377-381 [doi]

2014

Designing of low-power data oriented addersIreneusz Brzozowski, Andrzej Kos. mj, 45(9):1177-1186, 2014. [doi]

Double edge class BD hybrid DPWM implementation using linearized LBDD algorithmJacek Jasielski, Stanislaw W. Kuta, Witold Machowski, Ireneusz Brzozowski, Wojciech Kolodziejski. mixdes 2014: 209-214 [doi]

2013

An analysis of full adder cells for low-power data oriented adders designIreneusz Brzozowski, Damian Palys, Andrzej Kos. mixdes 2013: 346-351 [doi]

Universal design method of n-to-2n decodersIreneusz Brzozowski, Lukasz Zachara, Andrzej Kos. mixdes 2013: 279-284 [doi]

2008

A new approach to power estimation and reduction in CMOS digital circuitsIreneusz Brzozowski, Andrzej Kos. integration, 41(2):219-237, 2008. [doi]

2007

Two-level Logic Synthesis for Low Power Based on New Model of Power DissipationIreneusz Brzozowski, Andrzej Kos. ddecs 2007: 139-144

2005

Power Dissipation Reduction During Synthesis of Two-Level Logic Based on Probability of Input Vectors ChangesIreneusz Brzozowski, Andrzej Kos. patmos 2005: 456-465 [doi]

2001

Practical Aspects of Logic Synthesis Based on Functional DecompositionMariusz Rawski, Rafal Rzechowski, Zbigniew Jachna, Ireneusz Brzozowski. dsdm 2001: 38-45 [doi]

2000

Energy consumption minimisation with new synthesis methodIreneusz Brzozowski, Andrzej Kos. icecsys 2000: 605-608 [doi]

1999

Minimization of Power Consumption in Digital Integrated Circuits by Reduction of Switching ActivityIreneusz Brzozowski, Andrzej Kos. euromicro 1999: 1376 [doi]

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