Yan-Shiun Wu, Hong-Yan Su, Yi-Hsiang Chang, Rasit Onur Topaloglu, Yih-Lang Li. MapReduce-based pattern classification for design space analysis. In 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, Taiwan, April 16-19, 2018. pages 1-4, IEEE, 2018. [doi]
@inproceedings{WuSCTL18,
title = {MapReduce-based pattern classification for design space analysis},
author = {Yan-Shiun Wu and Hong-Yan Su and Yi-Hsiang Chang and Rasit Onur Topaloglu and Yih-Lang Li},
year = {2018},
doi = {10.1109/VLSI-DAT.2018.8373275},
url = {https://doi.org/10.1109/VLSI-DAT.2018.8373275},
researchr = {https://researchr.org/publication/WuSCTL18},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, Taiwan, April 16-19, 2018},
publisher = {IEEE},
isbn = {978-1-5386-4260-3},
}