A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os

Sih-Sian Wu, Kanwen Wang, Sai Manoj Pudukotai Dinakarrao, Tsung-Yi Ho, Mingbin Yu, Hao Yu. A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014. pages 1-4, IEEE, 2014. [doi]

Abstract

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