Verification of a Combinational Loop Based Arbitration Scheme in a System-On-Chip Integration Architecture - researchr publication

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Yang Xia, Pranav Ashar. Verification of a Combinational Loop Based Arbitration Scheme in a System-On-Chip Integration Architecture. In 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India. pages 449, IEEE Computer Society, 2000. [doi]

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