Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion

Xiaodong Xie, Alexander Albicki, Andrzej Krasniewski. Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion. In Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD 92, Cambridge, MA, USA, October 11-14, 1992. pages 482-485, IEEE Computer Society, 1992.

@inproceedings{XieAK92,
  title = {Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion},
  author = {Xiaodong Xie and Alexander Albicki and Andrzej Krasniewski},
  year = {1992},
  tags = {testing, design},
  researchr = {https://researchr.org/publication/XieAK92},
  cites = {0},
  citedby = {0},
  pages = {482-485},
  booktitle = {Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD  92, Cambridge, MA, USA, October 11-14, 1992},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-3110-4},
}