Xiaodong Xie, Alexander Albicki, Andrzej Krasniewski. Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion. In Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD 92, Cambridge, MA, USA, October 11-14, 1992. pages 482-485, IEEE Computer Society, 1992.
Abstract is missing.