A 28-nm 1R1W Two-Port 8T SRAM Macro With Screening Circuitry Against Read Disturbance and Wordline Coupling Noise Failures

Makoto Yabuuchi, Yasumasa Tsukamoto, Hidehiro Fujiwara, Miki Tanaka, Shinji Shinji, Koji Nii. A 28-nm 1R1W Two-Port 8T SRAM Macro With Screening Circuitry Against Read Disturbance and Wordline Coupling Noise Failures. IEEE Trans. VLSI Syst., 26(11):2335-2344, 2018. [doi]

Authors

Makoto Yabuuchi

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Yasumasa Tsukamoto

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Hidehiro Fujiwara

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Miki Tanaka

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Shinji Shinji

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Koji Nii

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