Akihiro Yamamoto, Yusuke Tanaka 0001, Hideki Ando, Toshio Shimada. Data prefetching and address pre-calculation through instruction pre-execution with two-step physical register deallocation. In Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, Roberto Giorgi, editors, Proceedings of the 2007 workshop on MEmory performance - DEaling with Applications, systems and architecture, MEDEA '07, Brasov, Romania, September 16, 2007. pages 33-40, ACM, 2007. [doi]
Abstract is missing.