A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture

Hideo Yamasaki, Tadashi Shibata. A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture. J. Solid-State Circuits, 42(9):2046-2053, 2007. [doi]

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