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Jin-Tai Yan. Layer Assignment of Buses and Nets With Via-Count Constraint in High-Speed PCB Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 38(3):512-525, 2019. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Efficient Layer Assignment of Bus-Oriented Nets in High-Speed PCB DesignsJin-Tai Yan. tcad, 35(8):1332-1344, 2016. [doi] Layer Assignment of Escape Buses with Consecutive Constraints in PCB DesignsJin-Tai Yan. todaes, 22(3), 2017. [doi] Bus Assignment Considering Flexible Escape Routing for Layer Minimization in PCB DesignsJin-Tai Yan. tcad, 41(8):2699-2713, 2022. [doi]
The following publications are possibly variants of this publication: