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Rong-Jyi Yang, Kuan-Hua Chao, Sy-Chyuan Hwu, Chuan-Kang Liang, Shen-Iuan Liu. A 155.52 mbps-3.125 gbps continuous-rate clock and data recovery circuit. J. Solid-State Circuits, 41(6):1380-1390, 2006. [doi]
Abstract is missing.