An architecture design for anti-jamming circuit with low power and low area cost in high-precision GNSS receiver chip

Yuheng Yang, Xueyong Liu, Jie Chen. An architecture design for anti-jamming circuit with low power and low area cost in high-precision GNSS receiver chip. IEICE Electronic Express, 16(10):20190179, 2019. [doi]

Authors

Yuheng Yang

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Xueyong Liu

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Jie Chen

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