The following publications are possibly variants of this publication:
- Design of High-speed, Low-power FIR Filters with Fine-grained Cost MetricsJiajia Chen, Chip-Hong Chang, A. Prasad Vinod. apccas 2006: 756-759 [doi]
- Design of A Low-Power-Consumption and High-Performance Sigma-Delta ModulatorYueyang Chen, Shun an Zhong, Hua Dang. csie 2009: 375-379 [doi]
- Synthesis of partition-codec architecture for low power and small area circuit designShanq-Jang Ruan, Jen-Chiun Lin, Po-Hung Chen, Kun-Lin Tsai, Feipei Lai. iscas 2001: 523-526 [doi]
- Design of a low power mixed-signal RAKE receiverPo-An Chen, Tzi-Dar Chiueh. iscas 2006: [doi]