Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process

Zhaonian Yang, Yuan Yang, Ningmei Yu, Juin J. Liou. Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process. Microelectronics Journal, 78:88-93, 2018. [doi]

Abstract

Abstract is missing.