Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs - researchr publication authors

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Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano. Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. In 1999 Design, Automation and Test in Europe (DATE 99), 9-12 March 1999, Munich, Germany. pages 658-663, IEEE Computer Society, 1999. [doi]

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