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Tomokazu Yoneda, Hideo Fujiwara. Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects. In Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008. pages 1366-1369, 2008. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Design and Optimization of Transparency-Based TAM for SoC TestTomokazu Yoneda, Akiko Shuto, Hideyuki Ichihara, Tomoo Inoue, Hideo Fujiwara. ieicet, 93-D(6):1549-1559, 2010. [doi] TAM Design and Optimization for Transparency-Based SoC TestTomokazu Yoneda, Akiko Shuto, Hideyuki Ichihara, Tomoo Inoue, Hideo Fujiwara. vts 2007: 381-388 [doi]
The following publications are possibly variants of this publication: