A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration

Changsik Yoo, Kye-Hyun Kyung, Kyunam Lim, Hi-Choon Lee, Joon-Wan Chai, Nak-Won Heo, Dong-jin Lee, Chang-Hyun Kim. A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration. J. Solid-State Circuits, 39(6):941-951, 2004. [doi]

@article{YooKLLCHLK04,
  title = {A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration},
  author = {Changsik Yoo and Kye-Hyun Kyung and Kyunam Lim and Hi-Choon Lee and Joon-Wan Chai and Nak-Won Heo and Dong-jin Lee and Chang-Hyun Kim},
  year = {2004},
  doi = {10.1109/JSSC.2004.827806},
  url = {https://doi.org/10.1109/JSSC.2004.827806},
  researchr = {https://researchr.org/publication/YooKLLCHLK04},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {39},
  number = {6},
  pages = {941-951},
}