A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration

Changsik Yoo, Kye-Hyun Kyung, Kyunam Lim, Hi-Choon Lee, Joon-Wan Chai, Nak-Won Heo, Dong-jin Lee, Chang-Hyun Kim. A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration. J. Solid-State Circuits, 39(6):941-951, 2004. [doi]

Abstract

Abstract is missing.