A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR

Sang-Min Yoo, Tae-Hwan Oh, Jung-Woong Moon, Seung-Hoon Lee, Un-Ku Moon. A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR. In Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, CICC 2002, Orlando, FL, USA, May 12-15, 2002. pages 441-444, IEEE, 2002. [doi]

@inproceedings{YooOMLM02,
  title = {A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR},
  author = {Sang-Min Yoo and Tae-Hwan Oh and Jung-Woong Moon and Seung-Hoon Lee and Un-Ku Moon},
  year = {2002},
  doi = {10.1109/CICC.2002.1012869},
  url = {https://doi.org/10.1109/CICC.2002.1012869},
  researchr = {https://researchr.org/publication/YooOMLM02},
  cites = {0},
  citedby = {0},
  pages = {441-444},
  booktitle = {Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, CICC 2002, Orlando, FL, USA, May 12-15, 2002},
  publisher = {IEEE},
  isbn = {0-7803-7250-6},
}