A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme

Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme. IEICE Transactions, 95-C(4):572-578, 2012. [doi]

@article{YoshimotoTOSMKY12,
  title = {A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme},
  author = {Shusuke Yoshimoto and Masaharu Terada and Shunsuke Okumura and Toshikazu Suzuki and Shinji Miyano and Hiroshi Kawaguchi and Masahiko Yoshimoto},
  year = {2012},
  url = {http://search.ieice.org/bin/summary.php?id=e95-c_4_572},
  researchr = {https://researchr.org/publication/YoshimotoTOSMKY12},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {95-C},
  number = {4},
  pages = {572-578},
}