Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs

Lizhen Yu, Jeffrey Hung, Boryau Sheu, Bill Huynh, Loc Nguyen, Shianling Wu, Laung-Terng Wang, Xiaoqing Wen. Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs. In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010. pages 331-339, IEEE Computer Society, 2010. [doi]

@inproceedings{YuHSHNWWW10,
  title = {Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs},
  author = {Lizhen Yu and Jeffrey Hung and Boryau Sheu and Bill Huynh and Loc Nguyen and Shianling Wu and Laung-Terng Wang and Xiaoqing Wen},
  year = {2010},
  doi = {10.1109/DFT.2010.47},
  url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2010.47},
  researchr = {https://researchr.org/publication/YuHSHNWWW10},
  cites = {0},
  citedby = {0},
  pages = {331-339},
  booktitle = {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4244-8447-8},
}