An FIR-Embedded Noise Filtering Method for ΔΣ Fractional-N PLL Clock Generators

Xueyi Yu, Yuanfeng Sun, Woogeun Rhee, Zhihua Wang. An FIR-Embedded Noise Filtering Method for ΔΣ Fractional-N PLL Clock Generators. J. Solid-State Circuits, 44(9):2426-2436, 2009. [doi]

@article{YuSRW09,
  title = {An FIR-Embedded Noise Filtering Method for ΔΣ Fractional-N PLL Clock Generators},
  author = {Xueyi Yu and Yuanfeng Sun and Woogeun Rhee and Zhihua Wang},
  year = {2009},
  doi = {10.1109/JSSC.2009.2021086},
  url = {https://doi.org/10.1109/JSSC.2009.2021086},
  researchr = {https://researchr.org/publication/YuSRW09},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {44},
  number = {9},
  pages = {2426-2436},
}