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A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations

Fan-Wei Yu, Bo-Han Zeng, Yu-Hung Huang, Hsin-I. Wu, Che-Rung Lee, Ren-Song Tsay. A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 643-648, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]

Authors

Fan-Wei Yu

This author has not been identified. Look up 'Fan-Wei Yu' in Google

Bo-Han Zeng

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Yu-Hung Huang

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Hsin-I. Wu

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Che-Rung Lee

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Ren-Song Tsay

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