Fan-Wei Yu, Bo-Han Zeng, Yu-Hung Huang, Hsin-I. Wu, Che-Rung Lee, Ren-Song Tsay. A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 643-648, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]
Abstract is missing.