Development of low-complexity all-digital frequency locked loop as 500 MHz reference clock generator for field-programmable gate array - researchr publication

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Sigit Yuwono, Seok-Kyun Han, Giwan Yoon, Han-Jin Cho, Sang-Gug Lee. Development of low-complexity all-digital frequency locked loop as 500 MHz reference clock generator for field-programmable gate array. IET Circuits, Devices & Systems, 8(2):73-81, 2014. [doi]

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