Cost Optimum Embedded DRAM Design by Yield Analysis

Youhei Zenda, Koji Nakamae, Hiromu Fujioka. Cost Optimum Embedded DRAM Design by Yield Analysis. In 11th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2003), 28-29 July 2003, San Jose, CA, USA. pages 20, IEEE Computer Society, 2003. [doi]

@inproceedings{ZendaNF03,
  title = {Cost Optimum Embedded DRAM Design by Yield Analysis},
  author = {Youhei Zenda and Koji Nakamae and Hiromu Fujioka},
  year = {2003},
  url = {http://csdl.computer.org/comp/proceedings/mtdt/2003/2004/00/20040020abs.htm},
  tags = {analysis, design},
  researchr = {https://researchr.org/publication/ZendaNF03},
  cites = {0},
  citedby = {0},
  pages = {20},
  booktitle = {11th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2003), 28-29 July 2003, San Jose, CA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2004-9},
}