A Novel Wafer Manipulation Method for Yield Improvement and Cost Reduction of 3D Wafer-on-Wafer Stacked ICs

Bei Zhang, Vishwani D. Agrawal. A Novel Wafer Manipulation Method for Yield Improvement and Cost Reduction of 3D Wafer-on-Wafer Stacked ICs. J. Electronic Testing, 30(1):57-75, 2014. [doi]

@article{ZhangA14-0,
  title = {A Novel Wafer Manipulation Method for Yield Improvement and Cost Reduction of 3D Wafer-on-Wafer Stacked ICs},
  author = {Bei Zhang and Vishwani D. Agrawal},
  year = {2014},
  doi = {10.1007/s10836-013-5429-1},
  url = {http://dx.doi.org/10.1007/s10836-013-5429-1},
  researchr = {https://researchr.org/publication/ZhangA14-0},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Testing},
  volume = {30},
  number = {1},
  pages = {57-75},
}