High-speed architectures for parallel long BCH encoders - researchr publication authors

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Xinmiao Zhang, Keshab K. Parhi. High-speed architectures for parallel long BCH encoders. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 1-6, ACM, 2004. [doi]

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