Xinmiao Zhang, Keshab K. Parhi. High-speed architectures for parallel long BCH encoders. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 1-6, ACM, 2004. [doi]
@inproceedings{ZhangP04:6,
title = {High-speed architectures for parallel long BCH encoders},
author = {Xinmiao Zhang and Keshab K. Parhi},
year = {2004},
doi = {10.1145/988952.988954},
url = {http://doi.acm.org/10.1145/988952.988954},
tags = {architecture},
researchr = {https://researchr.org/publication/ZhangP04%3A6},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004},
editor = {David Garrett and John Lach and Charles A. Zukowski},
publisher = {ACM},
isbn = {1-58113-853-9},
}