An FPGA-based Hardware Accelerator of RANSAC Algorithm for Matching of Images Feature Points

Ziwei Zhao, Fei Wang 0036, Qi Ni. An FPGA-based Hardware Accelerator of RANSAC Algorithm for Matching of Images Feature Points. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-4, IEEE, 2019. [doi]

Abstract

Abstract is missing.